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PLL multibit : ウィキペディア英語版
PLL multibit

A PLL multibit or multibit PLL is a phase-locked loop (PLL) which achieves improved performance compared to a unibit PLL by using more bits. Unibit PLLs use only the most significant bit (MSB) of each counter's output bus to measure the phase, while multibit PLLs use more bits.〔 PLLs are an essential component in telecommunications.
Multibit PLLs achieve improved efficiency and performance: better utilization of the frequency spectrum, to serve more users at a higher quality of service (QoS), reduced RF transmit power, and reduced power consumption in cellular phones and other wireless devices.
==Concepts==
A phase-locked loop is an electronic component or system comprising a closed loop for controlling the phase of an oscillator while comparing it with the phase of an input or reference signal. An indirect frequency synthesizer uses a PLL. In an all-digital PLL, a voltage-controlled oscillator (VCO) is controlled using a digital, rather than analog, control signal. The phase detector gives a signal proportional to the phase difference between two signals; in a PLL, one signal is the reference, and the other is the output of the controlled oscillator (or a divider driven by the oscillator).
In a unibit phase-locked loop, the phase is measured using only one bit of the reference and output counters, the most significant bit (MSB). In a multibit phase-locked loop, the phase is measured using more than one bit of the reference and output counters, usually including the most significant bit.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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